Low side n-channel fet protection circuit

ABSTRACT

The present invention relates to a battery protection circuit for protecting a plurality of batteries connected in series. The battery protection circuit includes: a controller for monitoring the batteries and outputting control signals based on predetermined conditions associated with the batteries; a first N-channel MOSFET and a second N-channel MOSFET coupled in a common-drain configuration in a low-side path, wherein at least one of the first and second N-channel MOSFETs turns off in response to the control signal received from the controller when at least one of the predetermined conditions is detected; and a gate protection circuit for preventing gate-to-source voltages of the first and second N-channel MOSFETs from exceeding a predetermined gate-to-source voltage level.

BACKGROUND OF THE INVENTION

The present invention relates to a battery protection circuit havingprotection functions that turn off the current path when an abnormalcondition occurs in a battery pack, in particular, but not by way oflimitation, of a plurality of Lithium Sulfur (LiS) batteries connectedin series.

Lithium Sulfur (LiS) rechargeable batteries provide users withhigh-energy and light-weight solutions. For example, LiS batteriesdeveloped by Sion Power™ Corporation, Tucson Ariz., are reported to becapable of delivering a specific energy of 400 Wh/kg and an energydensity of 425 Wh/liter. The specific energy of the LiS battery exceedsthat of state-of-the-art Lithium Ion (Li Ion) chemistry by a factor ofgreater than two, while the energy density stands at an equivalentlevel. That is, a LiS battery provides the same runtime for a portablecomputer in less than half the weight, or twice the runtime in the sameweight while having a volume comparable to a Lithium Ion battery.Another reported advantage of LiS batteries is their ability to workwell in very cold weather. Typical applications include unmanned aerialvehicles, military communication systems, rugged notebook computers,tablet personal computers, and portable medical devices.

Battery packs containing multiple battery cells are used to power upvarious pieces of equipment. To assure that each battery in the packoperates safely and gives the expected performance, the batteries can beprotected from abnormal conditions such as over-charge or over-dischargeconditions. Furthermore, most batteries generate heat as they charge;for some type of batteries, excessive charge can pose a potential firerisk. Conventional heat management involves heat sinking by using, forexample, circuit boards with large copper areas, thereby increasing thecost.

Since a LiS battery is capable of providing the same runtime in lessthan half the weight as compared to a Lithium Ion battery, it ispossible to expand the application range to high voltage situations bystacking up more LiS batteries than Li Ion batteries without increasingthe total weight for existing equipment. In conventionalover-charge/over-discharge protection schemes for such multi-cell,high-voltage packs, two power MOSFETs are implemented in the high-sidepath of the battery pack, together with a control circuit to drive eachof the gates. The rechargeable battery pack is configured such that itcan source energy to a load or can be recharged by a charger source. Oneof the MOSFETs is turned off to cut off the current path whenover-charge is detected during the charging phase with a charger; andthe other MOSFET is turned off to cut off the current path whenover-discharge is detected during the discharging phase with a load.There are two types of such high-side switches: two P-channel MOSFETsconnected back-to-back and two N-channel MOSFETs connected back-to-backwith an additional charge pump circuit.

The N-channel MOSFET uses electrons as the majority carriers, which havehigher mobility than holes, the majority carriers in the P-channelMOSFET. This means that, with the same physical dimensions, theN-channel MOSFET has higher transconductance than the P-channel MOSFET,which translates to lower drain-source resistance during the ON state,or RDSON. Typically, the RDSON of the N-channel MOSFET is two to threetimes lower than that of a similar-sized P-channel MOSFET, hence ahigher drain current ID by a similar factor. This also means that, forthe same RDSON and ID, the N-channel MOSFET typically requires lesssilicon, and therefore is less expensive than the P-channel MOSFET. Onefundamental property of the N-channel MOSFET is that for the switch tooperate in the linear region while it is on, the gate voltage VG needsto be higher than the drain voltage VD by a value of the thresholdvoltage VT. The VD is normally connected to the high-side input voltage,which is the highest voltage seen by the switch. Therefore, the VG hasto be either “level shifted up” from an existing voltage or “biased up”by a DC offset, both requiring additional circuitry. If the gate voltageis level-shifted up, typically a charge pump is needed. The charge pumprequires an internal oscillator, and at least one “flying” capacitor onthe chip to produce the gate voltage. This adds design complexity andsilicon, which offsets the silicon (and cost) reduction gained by theN-channel MOSFET's lower RDSON property.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is described in conjunction with the appendedfigures:

FIG. 1 is a block diagram showing a battery protection circuit,according to the first embodiment of the present invention, coupled to aplurality of batteries in series;

FIG. 2 is a block diagram showing a battery protection circuit,according to the second embodiment of the present invention, coupled toa plurality of batteries in series;

FIG. 3 is a flow diagram showing a discharging process according to thesecond embodiment when a load is attached;

FIG. 4 is a flow diagram showing a charging process according to thesecond embodiment when a charger is attached;

FIG. 5 is a block diagram showing a battery protection circuit,according to the third embodiment of the present invention, coupled to aplurality of batteries in series;

FIG. 6 is a block diagram showing a battery protection circuit accordingto a fourth embodiment of the present invention, coupled to a pluralityof batteries in series; and

FIG. 7 is a block diagram showing a battery protection circuit accordingto a fifth embodiment of the present invention, coupled to a pluralityof batteries in series.

In the appended figures, similar components and/or features may have thesame reference label. Further, various components of the same type maybe distinguished by following the reference label by a dash and a secondlabel that distinguishes among the similar components. If only the firstreference label is used in the specification, the description isapplicable to any one of the similar components having the same firstreference label irrespective of the second reference label.

DETAILED DESCRIPTION OF THE SPECIFIC EMBODIMENTS

The ensuing description provides preferred exemplary embodiment(s) only,and is not intended to limit the scope, applicability or configurationof the disclosure. Rather, the ensuing description of the preferredexemplary embodiment(s) will provide those skilled in the art with anenabling description for implementing a preferred exemplary embodiment.It should be understood that various changes may be made in the functionand arrangement of elements without departing from the spirit and scopeas set forth in the appended claims.

The battery protection circuit according to the present inventionincorporates two N-channel MOSFETs in the low-side path of a batterypack for providing protection functions for the battery pack whenabnormal conditions such as over-charge, over-discharge, over-current,or over-temperature conditions occur. The battery pack may contain anynumber of batteries (e.g., one, two, three, four, six, eight, ten,twelve, fourteen, sixteen, or twenty). For the case of LiS batteriesfrom Sion Power™, the voltage range is rated at 1.7V to 2.5V in theproduct specification. Thus, the pack voltage of a multi-cell LiSbattery pack can be 1.7V or greater, for example, 2.5V, 5V, 7.5V, 10V,12.5V, 15V, 17.5V, 20V, 25V, 30V, 35V, 40V, 45V or 50V, depending on thenumber of batteries in the pack. In addition to a controller havingvarious detection and control functions, the battery protection circuitaccording to the present invention incorporates a gate protectioncircuit for protecting the gates of the MOSFETs from high voltages.

FIG. 1 is a block diagram showing a battery protection circuit 100according to a first embodiment, coupled to a plurality of batteries104-1 through 104-n connected in series. P+ denotes a positive terminal,which is a connection point to an external device at the positive sideof the battery pack; and P− denotes a negative terminal, which is aconnection point to the external device at the negative side of thebattery pack. When the batteries need to be recharged, a charger isattached to P+ and P−, and the charge current flows from P+ through thebattery pack to P−. When a load is attached to P+ and P−, the batterypack sources energy to the load, and the discharge current flows from P+through the load to P−. A controller 108 comprises an over-chargedetection circuit 112, an over-discharge detection circuit 116, anover-temperature detection circuit 120, an over-current detectioncircuit 124 and a control circuit 128, and outputs control signals forcontrolling ON/OFF of the two N-channel MOSFETs (FET1 and FET2) in thelow-side path. A gate protection circuit 132 is provided to protect thegates from high voltages. (Details of the gate protection circuit 132are given later in this section.) A temperature sensing device 136 isprovided to sense the temperature of a representative spot of thebattery pack and sends the temperature information to theover-temperature detection circuit 120 in the controller 108.

FET1 is used as a discharge control switch, whereas FET2 is used as acharge control switch. These two MOSFETs are coupled in series in acommon drain configuration. The over-charge detection circuit 112 andthe over-discharge detection circuit 116 monitor a voltage across theentire battery pack in the present embodiment. Alternatively, a voltageacross any number of batteries in the pack may be monitored (e.g., one,two, three, four, six, eight, ten, twelve, fourteen, or sixteen). Duringnormal operations, where the monitored voltage is within the rangebetween predetermined upper and lower bounds, FET1 and FET2 are ON,allowing current flow for either charging or discharging situation. Whenboth FET1 and FET2 are ON, the current does not go through either of thebody diodes. Therefore, the voltage drop and hence the power dissipationin each of the MOSFETs are determined by the RDSON. The powerdissipation and resultant heating during the normal operation are thusreduced by employing the low-on resistance N-channel MOSFETs in thisembodiment instead of P-channel MOSFETs with the similar size.

The over-charge condition may be defined as a condition wherein themonitored voltage exceeds the predetermined upper bound, i.e. anover-charge detection voltage. When the over-charge condition occurs,the over-charge detection circuit 112 detects the monitored voltageexceeding the over-charge detection voltage and sends the information tothe control circuit 128, which sends a control signal through the gateprotection circuit 132 to the gate of FET2 to turn off the chargecontrol switch FET2. When FET2 is OFF, a possible path for the chargecurrent to pass is through the body diode in FET2; however, the bodydiode is reverse-biased in the common-drain configuration as shown inFIG. 1, and thus the charge current is shut off except for a smallamount of leakage current. When the monitored voltage which exceeded theover-charge detection voltage falls below a predetermined voltage level,i.e. an over-charge cancellation voltage, the charge control switch FET2is turned back on, and the normal operation resumes. The over-chargecancellation voltage may be defined to be either equal to or differentfrom the over-charge detection voltage depending on the batterychemistry. In another embodiment, both FET1 and FET2 are turned off whenthe over-charge condition occurs, and turned back on when theover-charge condition ends. In this case, the circuit is configured suchthat the gate protection circuit 132 and the control circuit 128 areconnected at a single output pin (e.g. at P4 only instead of P4 and P5shown in FIG. 1) in order to control ON/OFF of both FET1 and FET2 inresponse to the same control signal from the control circuit 128.

Similarly, the over-discharge condition may be defined as a conditionwherein the monitored voltage falls below the predetermined lower bound,i.e. an over-discharge detection voltage. When the over-dischargecondition occurs, the over-discharge detection circuit 116 detects themonitored voltage below the over-discharge detection voltage and sendsthe information to the control circuit 128, which sends a control signalthrough the gate protection circuit 132 to the gate of FET1 to turn offthe discharge control switch FET1. When FET1 is OFF, a possible path forthe discharge current to pass is through the body diode in FET1;however, the body diode is reverse-biased in the common-drainconfiguration as shown in FIG. 1, and thus the discharge current is shutoff except for a small amount of leakage current. When the monitoredvoltage which fell bellow the over-discharge detection voltage becomesequal to or higher than another predetermined voltage level, i.e. anover-discharge cancellation voltage, the discharge control switch FET1is turned back on, and the normal operation resumes. The over-dischargecancellation voltage may be defined to be either equal to or differentfrom the over-discharge detection voltage depending on the batterychemistry. In another embodiment, both FET1 and FET2 are turned off whenthe over-discharge condition occurs, and turned back on when theover-discharge condition ends. In this case, the circuit is configuredsuch that the gate protection circuit 132 and the control circuit 128are connected at a single output pin (e.g. at P4 only instead of P4 andP5 shown in FIG. 1) in order to control ON/OFF of both FET1 and FET2 inresponse to the same control signal from the control circuit 128.

When the charging or discharging current exceeds a predetermined currentvalue due to short-circuiting or the like, as detected by theover-current detection circuit 124, FET1 is turned off for thedischarging case or FET2 is turned off for the charging case. Theturned-off MOSFET is turned back on when the discharging or chargingcurrent which exceeded the predetermined current value falls below thepredetermined current value, and the normal operation resumes. Inanother embodiment, both FET1 and FET2 are turned off when theover-current condition occurs, and turned back on when the over-currentcondition ends. In this case, only a single output pin of the controller108 is used to send a control signal to control ON/OFF of both FET1 andFET2. In one example, the over-current condition is detected when thevoltage at the input pin for the over-current detection (e.g. P6 asshown in FIG. 1) exceeds a predetermined voltage level, i.e. anover-current detection voltage. In another example, a sense resistor isinserted in the current path such that the voltage across the senseresistor and hence the current can be measured. In this case, two nodeson both sides of the sense resistor are connected to two pins of thecontroller 108, respectively. A wide variety of over-current sensingtechniques are known by those skilled in the art; thus, details areomitted here in the description as well as in the drawings.

Prevention measures of battery overheating are also incorporated in thebattery protection circuit according to the present invention. Thetemperature sensing device 136 is provided to sense a “hot spot” of thebattery pack. This spot could be, for example, on a battery located nearthe center of the pack. Specifically, the temperature sensing device 136can be a thermistor, a thermocouple, an RTD (Resistance TemperatureDetector), an IR thermometer and the like. The temperature is sensed bythe temperature sensing device 136, and the temperature information issent to the over-temperature detection circuit 120. When the temperatureexceeds a predetermined temperature value, the over-temperaturedetection circuit 120 sends the information to the control circuit 128,which sends a control signal through the gate protection circuit 132 tothe gate of FET1 to turn off FET1 for the discharging case or to thegate of FET2 to turn off FET2 for the charging case. When thetemperature which exceeded the predetermined temperature value fallsbelow the predetermined temperature value, the turned-off MOSFET isturned back on to resume the normal operation. In another embodiment,both FET1 and FET2 are turned off when the over-temperature conditionoccurs, and turned back on when the over-temperature condition ends. Inthis case, only a single output pin of the controller 108 is used tosend a control signal to control ON/OFF of both FET1 and FET2.

For the case of a multi-cell, high voltage battery pack, the highvoltage potential impressed by the pack (or even a greater potentialdepending on the bias) can be imposed on the output pins of thecontroller 108. If the gates of the MOSFETs in the low-side path aredirectly connected to the output pins without protection, thegate-to-source voltages can exceed the maximum allowable voltage, whichis around 20V in a N-channel MOSFET, resulting in gate oxide breakdown.Therefore, the use of MOSFETs in the low-side path is limited to smallcell count (e.g., one or two cells in series), low voltage packs in theabsence of proper gate protections. To circumvent the high voltagepotential issue associated with the use of multi-cell, high voltagepacks, one design choice is to implement P-channel MOSFETs or N-channelMOSFETs with charge pumps in the high-side path of the protectioncircuit. In marked contrast, the present invention incorporates theN-channel MOSFETs in the low-side path and provides the gate protectioncircuit 132 to lower the gate-to-source voltages to the safe level,thereby allowing a multi-cell, high voltage pack even with the low-sideN-channel MOSFETs. Through utilization of a circuit topology with alowest possible component count for the gate protection circuit 132, thecost of the overall battery protection circuit 100 becomes lower thanthe case of using P-channel MOSFETs or N-channel MOSFETs with chargepumps in the high-side path. At the same time, the operating range ofcharge voltages and pack voltages (proportional to the number of cellsin the pack) is widened.

FIG. 2 is a block diagram showing a protection circuit 200 according toa second embodiment of the present invention. A specific implementationof the gate protection circuit 132 is depicted. In this embodiment, thegate protection circuit 132 comprises three resistors R10, R100 andR200, one Schottky diode SR100, one Zener diode ZD10, and onesmall-signal FET. The resistor R10 is connected to the second ground. P−is connected to a point internal to the point where the small-signal FETis connected. The gates of FET1 and FET2 are coupled to the commonoutput pin of the controller 108, receiving a control signal from thecontrol circuit 128. Thus, ON/OFF of FET1 and FET2 is controlled by thesame control signal from the single output pin in this embodiment. Inanother embodiment, the circuit is configured such that the two gatesreceive separate control signals from respective output pins toseparately control ON/OFF of the two MOSFETs.

The voltage at the output pin (i.e. the output voltage of the controller108) can be varied from zero to a high value defined by the voltagesupplied to the controller 108, which is the pack voltage. For thedischarge control switch FET1, the gate-to-source voltage does notexceed the output voltage of the controller 108. Thus, FET1 can beoperated safely by setting the output voltage of the controller 108 tobe less than the allowable maximum gate-to-source voltage. To turn onFET1, the controller 108 supplies a voltage to the gate, that is greaterthan the gate threshold voltage, which is typically 1-4V.

FIG. 3 is a flow diagram showing a discharging process 300 according tothe second embodiment when a load is attached to the terminals P+ andP−. When an abnormal condition such as an over-discharge conditionoccurs, the over-discharge detection circuit 116 detects the monitoredvoltage below the over-discharge detection voltage at block 304 andsends the information to the control circuit 128 at block 308, whichsends a control signal to the gate of FET1 at block 312 to turn off thedischarge control switch FET1. In the present embodiment both FET1 andFET2 are turned off at block 316 by the same control signal from thesingle output pin of the controller 108. The discharge current can beinterrupted when another abnormal condition such as an over-current orover-temperature condition is detected at block 304. When FET1 is OFF, apossible path for the discharge current to pass is through the bodydiode in FET 1; however, the body diode is reverse-biased in thecommon-drain configuration as shown in FIG. 2, and thus the dischargecurrent is interrupted except for a small amount of leakage current atblock 320.

When the load is attached and the MOSFETs are OFF, the P− potentialdrifts up at block 324 to the P+ potential level due to the lowerimpedance of the load than the interrupted discharging path. At step328, the body diode of the small-signal FET conducts slightly due to acurrent flow from P− (that is now at the P+ potential level) throughZD10 and R10. At step 332, SR100, which is a high voltage Schottky diode(e.g. 100V blocking voltage for a 20V battery pack) reduces the leakagecurrent that would otherwise flow into the controller 108.

When the monitored voltage which fell bellow the over-dischargedetection voltage becomes equal to or higher than another predeterminedvoltage level, i.e. an over-discharge cancellation voltage, thedischarge control switch FET1 is turned back on (blocks 336-348), andthe normal operation resumes. In the present embodiment, both FET1 andFET2 are turned back on at block 348 by the same control signal from thesingle output pin of the controller 108. The over-discharge cancellationvoltage may be defined to be either equal to or different from theover-discharge detection voltage depending on the battery chemistry.Cancellation of another abnormal condition such as an over-current orover-temperature condition is also carried out at block 336.

FIG. 4 is a flow diagram showing a charging process 400 according to thesecond embodiment when a charger is attached to the terminals P+ and P−.When an abnormal condition such as an over-charge condition occurs, theover-charge detection circuit 112 detects the monitored voltageexceeding the over-charge detection voltage at block 404 and sends theinformation to the control circuit 128 at block 408, which sends acontrol signal to the gate of FET2 at block 412 to turn off the chargecontrol switch FET2. In the present embodiment both FET1 and FET2 areturned off at block 416 by the same control signal from the singleoutput pin of the controller 108. The charge current can be interruptedwhen another abnormal condition such as an over-current orover-temperature condition is detected at block 404. When FET2 is OFF, apossible path for the discharge current to pass is through the bodydiode in FET2; however, the body diode is reverse-biased in thecommon-drain configuration as shown in FIG. 2, and thus the dischargecurrent is interrupted except for a small amount of leakage current atblock 420.

When a charger is attached and the MOSFETs are OFF, the voltage at P−decreases at block 424 and may drop several volts below reference grounddepending on the capability of the charger. If this voltage drops toolow, the gate-to-source voltage of FET2 could exceed the maximumallowable voltage, which is typically 20V. As the P− voltage lowers,current starts to flow through R10 and ZD10. This allows thesmall-signal FET to turn on at block 428 and clamp the gate-to-sourcevoltage of FET2 at block 432, thereby preventing the damaging voltagefrom being impressed between the gate and source of FET2. Further, R100and R200 provide voltage drops for respective gates as a buffer.

When the monitored voltage which exceeded the over-charge detectionvoltage becomes equal to or lower than another predetermined voltagelevel, i.e. an over-charge cancellation voltage, the charge controlswitch FET2 is turned back on (blocks 436-448), and the normal operationresumes. In the present embodiment, both FET1 and FET2 are turned backon at block 448 by the same control signal from the single output pin ofthe controller 108. The over-charge cancellation voltage may be definedto be either equal to or different from the over-charge detectionvoltage depending on the battery chemistry. Cancellation of anotherabnormal condition such as an over-current or over-temperature conditionis also carried out at block 436.

FIG. 5 shows a battery protection circuit 500 according to a thirdembodiment of the present invention. In this embodiment, a voltageacross each of the batteries 104-1-104-n is monitored by an over-chargedetection circuit 512 and an over-discharge detection circuit 516. Inaddition, temperature sensing devices 136-1-136-n are provided to sensethe batteries 104-1 through 104-n, respectively, and an over-temperaturedetection circuit 520 receives the respective temperature information.In FIG. 5, only the connections for the first (104-1) and last (104-n)batteries are explicitly shown for the sake of simplicity; however, itshould be understood that proper connections are provided so as tomonitor the voltages across individual batteries and individual batterytemperatures in this embodiment. Compared to the first embodimentwherein the entire pack voltage (or alternatively the voltage acrossone, two, three or any number of batteries in the pack) and thetemperature of one battery of the pack are monitored to detect abnormalconditions, the present embodiment allows for individual batterymonitoring. Therefore, when the over-charge, over-discharge,over-temperature or over-current condition is detected in at least onebattery, the control circuit receives the information and sends acontrol signal to turn off one of or both the MOSFETs to interrupt thecurrent flow.

In this individual monitoring scheme, the number of connections andhence the number of pins of the controller 508 to be used increase asthe number of batteries increases in the pack. In some embodiments,these monitoring connections are reduced due to limitations arising fromthe controller capability, packaging requirements, circuit real estateand the like. For example, monitoring of every other battery temperaturemay suffice for certain battery chemistry. Here, a “battery temperature”is defined as the temperature associated with one battery. In thisexample, detection of the over-temperature condition in at least onebattery triggers the turn-off action. In another example, the batterypack includes “balanced” batteries with nearly the same capacity andstate of charge so that only a few cell voltages may be monitored asrepresentatives. Here, a “cell voltage” is defined as a voltage acrossone battery. In this example, detection of the over-charge orover-discharge condition in at least one battery triggers the turn-offaction. Note that a certain degree of “cell-balancing” can be achievedby assembling the pack using batteries from the same supplier andproduction lot.

Automatic turn-on mechanisms of one or both of the MOSFETs areincorporated in the aforementioned embodiments, wherein the controllerdetects that an abnormal condition that triggered the turn-off actionhas ended or cancelled. However, for example, when an over-currentcondition is detected due to short-circuiting or other irreversibleproblems, the load or charger is removed and the entire circuit is shutdown for diagnosis. Normally, after the problem is fixed, the load orcharger is reattached and the circuit is turned back on manually. Thus,the automatic turn-on mechanisms are not necessary. In such cases, theprotection circuit can be configured such that only turn-off mechanismsare incorporated.

FIG. 6 is a block diagram showing a battery protection circuit 600according to a fourth embodiment of the present invention. In thisembodiment, the gate protection circuit 132 is integrated with variousdetection and control circuits on a same chip to provide a control IC608. Thus, the battery protection circuit 600 comprises two discretepower MOSFETs (FET1 and FET2) and the control IC 608, resulting inreduced parts count.

FIG. 7 is a block diagram showing a battery protection circuit 700according to a fifth embodiment of the present invention. In thisembodiment, the gate protection circuit 132, two MOSFETs and variousdetection and control circuits are integrated on a single chip toprovide a battery protection IC 708. The integration of low-voltagelogic functions with high-voltage or high-power devices, commonlyreferred to as power integration, can be realized by various advancedfabrication techniques. In one exemplary technique, dielectric isolationcan be employed to combine a metal-oxide-semiconductor (NMOS and PMOS)and other low-voltage elements with a bipolar junction transistor (BJT),a double-diffused metal-oxide semiconductor (DMOS) and otherhigh-voltage elements. In another exemplary technique, a high-voltageMOSFET can be fabricated by combining a plurality of NMOS and PMOS.These high-voltage elements can be incorporated by use of a variety offabrication methods such as NMOS, CMOS, Bipolar, BiCMOS, BiNMOS and thelike as known to those skilled in the art.

It is possible to integrate different sections depending on fabricationcapabilities, cost and various other considerations. For example, thegate protection circuit and the two MOSFETs may be integrated on a chip,leaving the controller 108 as it is. In another example, a subset of thegate protection circuit 108, such as only the resistors and thesmall-signal FET in the second embodiment shown in FIG. 2, may beintegrated with the controller 108, leaving discrete diodes as they are.

A number of variations and modifications of the disclosed embodimentscan also be used. For example, over-charge, over-discharge,over-temperature and over-current conditions are detected in thedisclosed embodiments. However, a subset of those conditions, forexample, only the over-charge and over-discharge conditions may bedetected. In another example, the connections from the control circuitto the gates via the gate protection circuit may be one or two using oneor two output pins, respectively, depending on the switching flexibilityrequired for turn-on/off actions in any one of the embodiments. Further,as described earlier, the voltage monitoring for detecting theover-charge or over-discharge condition may be performed across one, twoor any number of batteries including across the entire battery pack. Inanother embodiment, the connections are configured such that individualcell voltages are monitored. In this case, a cell voltage is defined asa voltage across one battery; one, two or any number of cell voltagesmay be monitored individually. In this individual cell voltagemonitoring scheme, the over-charge or over-discharge condition in atleast one battery triggers the turn-off action. Similarly, thetemperature monitoring can be performed on one, two or any number ofbatteries. Again, in this case, detection of the over-temperaturecondition in at least one battery triggers the turn-off action.

Specific details are given in the above description to provide athorough understanding of the embodiments. However, it is understoodthat the embodiments may be practiced without these specific details.For example, circuits may be shown in block diagrams in order not toobscure the embodiments in unnecessary detail. In other instances,well-known circuits, processes, algorithms, structures, and techniquesmay be shown without unnecessary detail in order to avoid obscuring theembodiments.

Implementation of the techniques, blocks, steps and means describedabove may be done in various ways. For example, these techniques,blocks, steps and means may be implemented in hardware, software, or acombination thereof. For a hardware implementation, the processing unitsmay be implemented within one or more application specific integratedcircuits (ASICs), digital signal processors (DSPs), digital signalprocessing devices (DSPDs), programmable logic devices (PLDs), fieldprogrammable gate arrays (FPGAs), processors, controllers,micro-controllers, microprocessors, other electronic units designed toperform the functions described above, and/or a combination thereof.

Also, it is noted that the embodiments may be described as a processwhich is depicted as a flowchart, a flow diagram, a data flow diagram, astructure diagram, or a block diagram. Although a flowchart may describethe operations as a sequential process, many of the operations can beperformed in parallel or concurrently. In addition, the order of theoperations may be re-arranged. A process is terminated when itsoperations are completed, but could have additional steps not includedin the figure. A process may correspond to a method, a function, aprocedure, a subroutine, a subprogram, etc. When a process correspondsto a function, its termination corresponds to a return of the functionto the calling function or the main function.

While the principles of the disclosure have been described above inconnection with specific apparatuses and methods, it is to be clearlyunderstood that this description is made only by way of example and notas limitation on the scope of the disclosure.

1. A battery protection circuit for protecting a plurality of batteriesconnected in series by controlling: (1) a discharging current flowingfrom the batteries through a load detachably attached between a positiveterminal and a negative terminal, or (2) a charging current flowing tothe batteries from a charger detachably attached between the positiveterminal and the negative terminal, the battery protection circuitcomprising: a controller for monitoring the batteries and outputtingcontrol signals based on predetermined conditions associated with thebatteries; a first N-channel MOSFET and a second N-channel MOSFETcoupled in a common-drain configuration in a low-side path, wherein atleast one of the first and second N-channel MOSFETs turns off inresponse to the control signal received from the controller when atleast one of the predetermined conditions is detected; and a gateprotection circuit for preventing gate-to-source voltages of the firstand second N-channel MOSFETs from exceeding a predetermined voltagelevel.
 2. The battery protection circuit according to claim 1, wherein:the first N-channel MOSFET turns off the discharging current in responseto the control signal when the load is attached; and the secondN-channel MOSFET turns off the charging current in response to thecontrol signal when the charger is attached.
 3. The battery protectioncircuit according to claim 2, wherein the gate protection circuitcomprises: a small-signal FET having a drain coupled to a gate of thesecond N-channel MOSFET and a source coupled to the negative terminal,wherein the small-signal FET turns on and clamps the gate-to-sourcevoltage of the second N-channel MOSFET when the gate-to-source voltageof the second N-channel MOSFET increases to a predeterminedgate-to-source voltage level during a period when the second N-channelMOSFET is off and the charger is attached.
 4. The battery protectioncircuit according to claim 3, wherein the gate protection circuitfurther comprises: a first diode having an anode coupled to the sourceof the small-signal FET and a cathode coupled to a gate of thesmall-signal FET; and a first resistor having one end coupled to thecathode of the first diode and the other end coupled to a ground,wherein current that flows through the first diode and the firstresistor controls ON/OFF of the small-signal FET.
 5. The batteryprotection circuit according to claim 3, wherein the gate protectioncircuit further comprises: a second diode having an anode coupled to anoutput pin of the controller and a cathode coupled to the gate of thesecond N-channel MOSFET and the drain of the small-signal FET forreducing leakage current flowing into the output pin.
 6. The batteryprotection circuit according to claim 3, wherein the gate protectioncircuit further comprises: a second resistor coupled to an output pin ofthe controller and to a gate of the first N-channel MOSFET for providinga voltage drop to the gate of the first N-channel MOSFET; and a thirdresistor coupled to the output pin of the controller and the gate of thesecond N-channel MOSFET for providing a voltage drop to the gate of thesecond N-channel MOSFET.
 7. The battery protection circuit according toclaim 2, wherein the controller comprises: an over-discharge detectioncircuit for detecting an over-discharge condition as the predeterminedcondition, the over-discharge detection circuit monitoring at least onecell voltage and processing information on the over-discharge conditionwhen at least one cell voltage falls below a predeterminedover-discharge detection voltage.
 8. The battery protection circuitaccording to claim 7, wherein the over-discharge detection circuitfurther detects an over-discharge cancellation and processes informationon the over-discharge cancellation for turning on the first N-channelMOSFET when the at least one cell voltage exceeds a predeterminedover-discharge cancellation voltage.
 9. The battery protection circuitaccording to claim 2, wherein the controller comprises: an over-chargedetection circuit for detecting an over-charge condition as thepredetermined condition, the over-charge detection circuit monitoring atleast one cell voltage and processing information on the over-chargecondition when at least one cell voltage exceeds a predeterminedover-charge detection voltage.
 10. The battery protection circuitaccording to claim 9, wherein the over-charge detection circuit furtherdetects an over-charge cancellation and processes information on theover-charge cancellation for turning on the second N-channel MOSFET whenthe at least one cell voltage falls below a predetermined over-chargecancellation voltage.
 11. The battery protection circuit according toclaim 2, wherein the controller comprises: an over-current detectioncircuit for detecting an over-current condition as the predeterminedcondition, the over-current detection circuit monitoring the charging ordischarging current and processing information on the over-currentcondition when the charging or discharging current exceeds apredetermined over-current value.
 12. The battery protection circuitaccording to claim 11, wherein the over-current detection circuitfurther detects an over-current cancellation and processes informationon the over-current cancellation for turning on the first N-channelMOSFET for the discharging current when the discharging current fallsbelow the predetermined over-current value, or turning on the secondN-channel MOSFET for the charging current when the charging currentfalls below the predetermined over-current value.
 13. The batteryprotection circuit according to claim 2, further comprising at least onetemperature sensing device for measuring at least one batterytemperature, respectively, wherein the controller comprises: anover-temperature detection circuit for detecting an over-temperaturecondition as the predetermined condition based on measurements by the atleast one temperature sensing device, the over-temperature detectioncircuit processing information on the over-temperature condition when atleast one battery temperature exceeds a predetermined temperature value.14. The battery protection circuit according to claim 13, wherein theover-temperature detection circuit further detects an over-temperaturecancellation and processes information on the over-temperaturecancellation for turning on the first N-channel MOSFET for thedischarging current or the second N-channel MOSFET for the chargingcurrent when the at least one battery temperature falls below thepredetermined temperature value.
 15. The battery protection circuitaccording to claim 1, wherein at least part of the gate protectioncircuit is integrated with the controller on a same chip.
 16. Thebattery protection circuit according to claim 1, wherein at least partof the gate protection circuit is integrated with the first and secondN-channel MOSFETs on a same chip.
 17. The battery protection circuitaccording to claim 1, wherein at least part of the gate protectioncircuit and the first and second N-channel MOSFETs are integrated withthe controller on a same chip.
 18. The battery protection circuitaccording to claim 1, the battery is a Lithium Sulfur battery.
 19. Abattery protection circuit comprising: a positive terminal and anegative terminal configured to be coupled to a plurality of batteriesin series, the plurality of batteries having a total voltage of 7.5volts or greater, wherein a discharging current flows from the batteriesthrough a load detachably attached between the positive terminal and thenegative terminal, or a charging current flows to the batteries from acharger detachably attached between the positive terminal and thenegative terminal; a controller for monitoring the batteries andoutputting control signals based on predetermined conditions associatedwith the batteries; a first N-channel MOSFET and a second N-channelMOSFET coupled in a common-drain configuration in a low-side path,wherein the first N-channel MOSFET turns off the discharging current inresponse to the control signal, and the second N-channel MOSFET turnsoff the charging current in response to the control signal; and asmall-signal FET that turns on and clamps a gate-to-source voltage ofthe second N-channel MOSFET when the gate-to-source voltage of thesecond N-channel MOSFET increases to a predetermined level.
 20. Thebattery protection circuit according to claim 19, further comprising: afirst diode having an anode coupled to a source of the small-signal FETand a cathode coupled to a gate of the small-signal FET, wherein a drainof the small-signal FET is coupled to a gate of the second N-channelMOSFET and the source of the small-signal FET is further coupled to thenegative terminal; a first resistor having one end coupled to thecathode of the first diode and the other end coupled to a ground,wherein current that flows through the first diode and the firstresistor controls ON/OFF of the small-signal FET; a second diode havingan anode coupled to an output pin of the controller and a cathodecoupled to the gate of the second N-channel MOSFET and the drain of thesmall-signal FET for reducing leakage current flowing into the outputpin; a second resistor coupled to the output pin of the controller andto a gate of the first N-channel MOSFET for providing a first voltagedrop to the gate of the first N-channel MOSFET; and a third resistorcoupled to the output pin of the controller and the gate of the secondN-channel MOSFET for providing a second voltage drop to the gate of thesecond N-channel MOSFET.
 21. The battery protection circuit according toclaim 19, wherein the controller comprises: an over-discharge detectioncircuit for detecting an over-discharge condition as one of thepredetermined conditions, the over-discharge detection circuitmonitoring at least one cell voltage and processing information on theover-discharge condition when at least one cell voltage exceeds apredetermined over-discharge detection voltage; and an over-chargedetection circuit for detecting an over-charge condition as another ofthe predetermined conditions, the over-charge detection circuitmonitoring at least one cell voltage and processing information on theover-charge condition when at least one cell voltage exceeds apredetermined over-charge detection voltage.
 22. The battery protectioncircuit according to claim 19, wherein the controller comprises: anover-current detection circuit for detecting an over-current conditionas the predetermined condition, the over-current detection circuitmonitoring the charging or discharging current and processinginformation on the over-current condition when the charging ordischarging current exceeds a predetermined over-current value.
 23. Thebattery protection circuit according to claim 19, further comprising atleast one temperature sensing device for measuring at least one batterytemperature, respectively, wherein the controller comprises: anover-temperature detection circuit for detecting an over-temperaturecondition as the predetermined condition based on measurements by the atleast one temperature sensing device, the over-temperature detectioncircuit processing information on the over-temperature condition when atleast one battery temperature exceeds a predetermined temperature value.24. The battery protection circuit according to claim 19, the battery isa Lithium Sulfur battery.
 25. A battery protection circuit comprising: apositive terminal and a negative terminal configured to be coupled tothree or more batteries in series, wherein a discharging current flowsfrom the batteries through a load detachably attached between thepositive terminal and the negative terminal, or a charging current flowsto the batteries from a charger detachably attached between the positiveterminal and the negative terminal; a controller for monitoring thebatteries and outputting control signals based on predeterminedconditions associated with the batteries; a first N-channel MOSFET and asecond N-channel MOSFET coupled in a common-drain configuration in alow-side path, wherein the first N-channel MOSFET turns off thedischarging current in response to the control signal, and the secondN-channel MOSFET turns off the charging current in response to thecontrol signal; and a small-signal FET that turns on and clamps agate-to-source voltage of the second N-channel MOSFET when thegate-to-source voltage of the second N-channel MOSFET increases to apredetermined level.